layout of an inverter with active load

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< Back Lecture 21.pdf a Vin (red) Blue – metal Red – Polysilicon gate Green -n diffusion/active area GND (blue) ELEC143 Example of the sketch of the layout of an inverter with active load . With the aid of stick diagram, actual layouts can be drawn to scale using appropriate am and between layouts as discussed in last lecture. For the metal lines connecting the devices, and to Vpp or GND, the width and length of these lines also need to be expressed in terms of m . For the circuit in the example earlier, a possible rough sketch of the layout is shown in the diagram on right-hand side, where (W/L)> (W/L).
. Note this is a rough sketch as it is not
to correct scaling and also does not
include all the alignment errors
. For the design coursework, you need
to make sure all layouts are presented
to scale and include all the necessary
alignment error, including spacing
between devices and metal lines
ELEC143

Example of the sketch of the layout of an
inverter with passive load
. Also consider an inverter with a passive load (p-n junction), in order to draw
layouts for the inverter, the respective values for W and L for each device need
to be determined
Voo
RL
For the passive load, the number of
squares depends on the value of
resistance required. Each square is
given by minimum feature size.
Note the serpentine uses less area
compared to linear layout
(refer to pn junction notes)
Vout
VIR
Ros
Dimensions for Wand L for the
driver transistor is not the same
as those for the passive load
ELEC143
G
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